A newly drafted IEEE standard will bring more consistency to defect metrics in analog/mixed (AMS) designs, a long-overdue step that has become too difficult to ignore in the costly heterogeneous ...

As chips become more heterogeneous with more integrated functionality, testing them presents increasing challenges — particularly for high-speed system-on-chip (SoC) designs with limited test pin ...

System-level test (SLT), once used largely as a stopgap measure to catch issues missed by automated test equipment (ATE), has evolved into a necessary test insertion for high-performance processors, ...

With more than 20% of organizations deploying updates multiple times per day, according to my company's study, the complexity of test authoring has grown significantly. Test authoring is the process ...