#define UART_PIN_AF_UART1_PA9 GPIO_AF7_USART1 #define UART_PIN_AF_UART1_PA10 GPIO_AF7_USART1 #define UART_PIN_AF_UART1_PB6 GPIO_AF7_USART1 #define UART_PIN_AF_UART1 ...
A Universal Asynchronous Receiver-Transmitter (UART) communication subsystem implemented in Verilog. This project features custom Finite State Machines (FSMs), debouncers, metastability synchronizers, ...
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